Based on the traditional CORDIC algorithm, an improved algorithm is proposed, and then a hybrid algorithm is given to realize the operation of sine and cosine functions. Without affecting the data accuracy requirements, the algorithm can not only reduce the number of iterations and the required ROM storage space, but also facilitate the pipeline design of the structure, reduce the clock cycle of the system, and improve the speed. Finally, it was implemented on Altera’s Cyclone series of chips EP1C3T100C6. The simulation results show that this algorithm has the advantages of high operation speed and low resources compared with traditional algorithms, and the maximum working frequency can reach 184.77 MHz, which is 11.84% higher than that of traditional algorithms, and saves nearly 17.35% of hardware resources compared with traditional CORDIC algorithms.