Design of a Power Quality Monitoring Device Based on FPGA
[1]Jiang Zheng,Zhou Yong,Chen Xuemei,et al.Design of a Power Quality Monitoring Device Based on FPGA[J].Journal of Zhengzhou University (Engineering Science),2016,37(02):29-32.[doi:10.3969/j.issn.1671-6833.201505040]
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Journal of Zhengzhou University (Engineering Science)[ISSN
1671-6833/CN
41-1339/T] Volume:
37卷
Number of periods:
2016 02
Page number:
29-32
Column:
Public date:
2016-04-18
- Title:
- Design of a Power Quality Monitoring Device Based on FPGA
- CLC:
- -
- DOI:
- 10.3969/j.issn.1671-6833.201505040
- Abstract:
- In order to improve the accuracy and speed of power quality monitoring, a monitoring device with FPGA as the core of processing and control is designed. The hardware part mainly includes signal acquisition unit, communication unit, power supply unit, etc. In terms of software, the embedded NIOS Ⅱ is customized on the FPGA. The core optimizes the data parallel processing process, builds a phase-locked frequency multiplication module and an FFT harmonic analysis algorithm module in the FPGA chip, and realizes synchronous sampling and analysis of power quality data. The test shows that the device has fast response speed and high measurement accuracy. High performance and good real-time performance, in line with national standards on power quality monitoring.
- References:
- -
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