Field programmable gate array;  discrete cosine transform;  Joint Photographic Experts Group;  Distributed algorithms

A two-dimensional discrete cosine transformation module suitable for JPEG image compression system is designed, and a one-dimensional cosine discrete transformation unit is first designed by using the method of row-column separation, which adopts the improved symbolic distributed algorithm structure proposed by the author, which can significantly improve the throughput rate in hardware implementation. Then, the unit is multiplexed to complete the FPGA design of two-dimensional discrete cosine transform. After the EPF10K100EQC208-1 of the selected device is synthesized, it is shown that the maximum frequency of the one-dimensional cosine discrete conversion unit can reach 104.17 MHz, which meets the high throughput requirements of JPEG image compression system.