[1]李天义,富坤,耿跃华,等.融合编译功能的组合电路测试集生成方式[J].郑州大学学报(工学版),2014,35(02):65-69.[doi:10.3969/j.issn.1671-6833.2014.02.015]
 LI Tianyi,FU Ku,CENG Yuehua,et al.Generation of Combinational Circuit Test Suite Combined with Compilation Feature[J].Journal of Zhengzhou University (Engineering Science),2014,35(02):65-69.[doi:10.3969/j.issn.1671-6833.2014.02.015]
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融合编译功能的组合电路测试集生成方式()
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《郑州大学学报(工学版)》[ISSN:1671-6833/CN:41-1339/T]

卷:
35
期数:
2014年02期
页码:
65-69
栏目:
出版日期:
2014-04-30

文章信息/Info

Title:
Generation of Combinational Circuit Test Suite Combined with Compilation Feature
作者:
李天义1富坤1耿跃华2徐丹1
Author(s):
LI TianyiFU KuCENG Yuehua;
1.School of Computer Seienee and Engineering, Hebei University of Technology , Tianjin 300401, China; 2. School of Eleetrie alEngineering and Automation, Hebei Univeristy of Technology , Tianjin 300130 , China
Keywords:
compilation prineiple crilical path method combinational eireuit test suite
DOI:
10.3969/j.issn.1671-6833.2014.02.015
文献标志码:
A
Abstract:
By researching the generation ol test suite in combinational eireuit testing instrimenis, a generatonof combinational cireuit test suite combined with compilation feature was proposed. The generation of testsuite, which combined the compilers prineiples with test suite generation algorithm, solving some diffieulproblems in combinational cireuit testing instruments ; the type of tested chip is not easy to expand, hardwaredesign cireuit is complexity, and so on. This paper starts from the funetional expression of tested chip, elabo.rating the analysis proeess of the lexieal, syntax and semanties in detail. And taking eritieal path method forexample , this paper gives a detailed design scheme of the test suite generation. Finally, aeeording to the de.sign, we designed a combinational cireuit test system based on STC89C52 chip, and gave the performanee testresults of the system.
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