[1]杨指政,杜子东,文渊博.基于国产PuDianNao 芯片的向量函数库优化[J].郑州大学学报(工学版),2023,44(01):31-37.[doi:10.13705/j.issn.1671-6833.2023.01.013]
　Yang Zhizheng,Du Zidong,Wen Yuanbo..Optimization of Vector Function Library Based on Domestic PuDianNao Chip[J].Journal of Zhengzhou University (Engineering Science),2023,44(01):31-37.[doi:10.13705/j.issn.1671-6833.2023.01.013]

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基于国产PuDianNao 芯片的向量函数库优化()

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《郑州大学学报(工学版)》[ISSN:1671-6833/CN:41-1339/T]

卷:

44

期数:

2023年01期

页码:

31-37

栏目:

出版日期:

2022-12-06

文章信息/Info

Title:

Optimization of Vector Function Library Based on Domestic PuDianNao Chip

作者:

杨指政¹; 杜子东²; 文渊博³

1.郑州大学河南先进技术研究院,河南郑州 450001, 2.中国科学院计算技术研究所计算机体系结构国家重点实验室,北京 100190, 3.中国科学技术大学计算机学院,安徽合肥 230026

Author(s):

Yang Zhizheng¹;  Du Zidong²;  Wen Yuanbo³.

Zhengzhou University Henan Advanced Technical Research Institute, Henan Zhengzhou 450001, National Key Laboratory of Computing Technology Structure Structure of the Institute of Computing Technology of the Chinese Academy of Sciences, Beijing 100190, Chinese University of Science and Technology of Science and Technology

关键词:

向量化函数;  PuDianNao-VecMath;  国产人工智能处理器;  暴露分支范围和分支扁平化

Keywords:

Direction function;  Pudiannao-VECMATH;  domestic artificial intelligence processor;  exposed branch scope and branch flat

分类号:

TP311

DOI:

10.13705/j.issn.1671-6833.2023.01.013

文献标志码:

A

摘要:

目前国产人工智能处理器PuDianNao 芯片上的向量数学函数只能依靠循环调用标量函数来实现,该方法 性能比较低。基于PuDianNao 芯片提出了3 种优化方法。方法一为插值方法;方法二为SIMD 加掩码方法;方法三 基于PuDianNao 的硬件阵列结构,使用VLIW 指令操作阵列中的每个处理单元,封装出SIMT 编程模型,提出了暴露 分支范围和分支扁平化的编程方法。对以上3 种方法进行精度和性能测试,对比实验结果表明,方法三具有最好 的精度和性能。使用方法三实现基于国产PuDianNao 芯片的向量数学函数库PuDianNao-VecMath,解决了数学函 数多分支结构难以向量化的难题。该函数库精度性能较好、功能稳定、运行正确,提供的接口包括取整函数、超越 函数、比较函数、激活函数等常见基础数学库函数。在精度上,将函数定义域区间全数据作为输入,运算结果和标 量函数在CPU i7 运行的结果进行对比。结果表明,单精度版本最大ULP 值为2,半精度版本最大ULP 值为1。性 能与使用标量循环相比有较大提高,单精度版本相对于标量循环平均加速比平均值为18. 26,最大加速比为35. 90; 半精度版本平均加速比平均值为15. 65,最大加速比为30. 11。

Abstract:

At present, the vector math functions on the PuDianNao chip of the domestic artificial intelligence processor can only be implemented by calling scalar functions cyclically, and the performance of this method is relatively low. Based on the PuDianNao chip, three optimization methods were proposed. The first two were interpolation method and SIMD masking method. Thirdly, based on a hardware array structure on PuDianNao, VLIW instructions were used to operate each processing unit in the array, and the SIMT programming model was encapsulated programmatically. The accuracy and performance of the above three methods were tested, and the experimental results showed that the third method had the best accuracy and performance. The third method was used to implement the vector mathematical function library PuDianNao-VecMath based on the domestic PuDianNao chip, which solved the problem that the multi-branch structure of mathematical functions was difficult to vectorize. The function library had good precision performance, stable functions and correct operation. The provided interfaces included rounding functions, transcendental functions, comparison functions, activation functions and other common basic math library functions. In terms of precision, the entire data of the function definition domain interval was used as input, and the operation result was compared with the result of the scalar function running on the CPU i7. The results showed that the maximum ULP value was 2, and the maximum ULP value of the half-precision version was 1. Compared with the use of scalar loop, the performance was greatly improved. Compared with the scalar loop, the single-precision version had an average speed-up ratio of 18. 26 and a maximum speed-up ratio of 35. 90. The halfprecision version had an average speed-up ratio of 15. 65 and a maximum speed-up ratio of 30. 11.

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